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CY7C167A
16K x 1 Static RAM
Features
* Automatic power-down when deselected * CMOS for optimum speed/power * High speed -- 15 ns * Low active power -- 495 mW * Low standby power -- 220 mW * TTL-compatible inputs and outputs * Capable of withstanding greater than 2001V electrostatic discharge * VIH of 2.2V
Functional Description
The CY7C167A is a high-performance CMOS static RAM organized as 16,384 words by 1 bit. Easy memory expansion is provided by an active LOW Chip Enable (CE) and three-state drivers. The CY7C167A has an automatic power-down feature, reducing the power consumption by 67% when deselected. Writing to the device is accomplished when the Chip Select (CE) and Write Enable (WE) inputs are both LOW. Data on the input pin (DI) is written into the memory location specified on the address pins (A0 through A 13). Reading the device is accomplished by taking the Chip Enable (CE) LOW, while (WE) remains HIGH. Under these conditions, the contents of the location specified on the address pins will appear on the data output (DO) pin. The output pin remains in a high-impedance state when Chip Enable is HIGH, or Write Enable (WE) is LOW. A die coat is used to insure alpha immunity.
Logic Block Diagram
Pin Configuration
DIP Top View DI A0 A1 A2 A3 A4 A5 A6 DO WE GND CE
1 2 3 4 5 6 7 8 9 10 7C167A 20 19 18 17 16 15 14 13 12 11
INPUT BUFFER
V CC A13 A12 A11 A10 A9 A8 A7 DI CE
A0 A1 A2 A3 A4 A5 A6
ROW DECODER
SENSE AMP
128 x 128 ARRAY
DO
C167A-2
COLUMN DECODER
POWER DOWN
WE
A12 A13
A10
A11
A7
A8
A9
C167A-1
Selection Guide
7C167A-15 Maximum Access Time (ns) Maximum Operating Current (mA) 15 90 7C167A-20 20 90 7C167A-25 25 90 7C167A-35 35 90 7C167A-45 45 90
Cypress Semiconductor Corporation
*
3901 North First Street
*
San Jose
*
CA 95134
*
408-943-2600 February 3, 2000
CY7C167A
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.) Storage Temperature .....................................-65C to +150C Ambient Temperature with Power Applied ..................................................-55C to +125C Supply Voltage to Ground Potential (Pin 20 to Pin 10)................................................ -0.5V to +7.0V DC Voltage Applied to Outputs in High Z State .................................................... -0.5V to +7.0V DC Input Voltage ................................................. -3.0V to +7.0V Output Current into Outputs (LOW)............................. 20 mA Static Discharge Voltage ........................................... >2001V (per MIL-STD-883, Method 3015) Latch-Up Current ..................................................... >200 mA
Operating Range
Range Commercial Ambient Temperature[1] 0C to +70C VCC 5V 10%
Electrical Characteristics Over the Operating Range
7C167A-15 Parameter VOH VOL VIH VIL IIX IOZ IOS ICC ISB Description Output High Voltage Output Low Voltage Input High Voltage Input Low Voltage Output Leakage Current Output Short Circuit Current[3] VCC Operating Supply Current Automatic CE Power-Down Current[4]
[2]
7C167A-20 Min. 2.4 Max. 0.4 2.2 -0.5 -10 -10 VCC 0.8 +10 +10 -350 90 40
7C167A-25 Min. 2.4 0.4 2.2 -0.5 -10 -10 VCC 0.8 +10 +10 -350 90 20 Max. Unit V V V V A A mA mA mA
Test Conditions VCC = Min., IOH = -4.0 mA VCC = Min., IOL = 12.0 mA, 8.0 mA Mil
Min. 2.4
Max. 0.4
2.2 -0.5 GND < V I < VCC GND < VO < VCC Output Disabled VCC = Max., VOUT = GND VCC = Max., IOUT = 0 mA Max. VCC, CE > V IH -10 -10
VCC 0.8 +10 +10 -350 90 40 7C167A-35
Input Load Current
7C167A-45 Min. 2.4 Max. 0.4 2.2 -0.5 -10 -10 VCC 0.8 +10 +10 -350 90 20 Unit V V V V A A mA mA mA
Parameter VOH VOL VIH VIL IIX IOZ IOS ICC ISB
Description Output High Voltage Output Low Voltage Input High Voltage Input Low Voltage Output Leakage Current Output Short Circuit Current[3] VCC Operating Supply Current Automatic CE Power-Down Current[4]
[2]
Test Conditions VCC = Min., IOH = -4.0 mA VCC = Min., IOL = 12.0 mA, 8.0 mA Mil
Min. 2.4
Max. 0.4
2.2 -0.5 GND < V I < VCC GND < VO < VCC Output Disabled VCC = Max., VOUT = GND VCC = Max., IOUT = 0 mA Max. VCC, CE > V IH -10 -10
VCC 0.8 +10 +10 -350 90 20
Input Load Current
Notes: 1. TA is the case temperature. 2. VIL min. = -3.0V for pulse durations less than 30 ns. 3. Duration of the short circuit should not exceed 30 seconds. 4. A pull-up resistor to VCC on the CE input is required to keep the device deselected during VCC power-up, otherwise ISB will exceed values given.
2
CY7C167A
Capacitance[5]
Parameter CIN COUT CCE Description Input Capacitance Output Capacitance Chip Enable Capacitance Test Conditions TA = 25C, f = 1 MHz, VCC = 5.0V Max. 10 10 6 Unit pF pF pF
AC Test Loads and Waveforms
R1 329 5V OUTPUT 30 pF INCLUDING JIG AND SCOPE Equivalent to: R2 202 5V OUTPUT 5 pF INCLUDING JIG AND SCOPE R2 202 R1 329 ALL INPUT PULSES 3.0V GND 10% 90% 90% 10% < 5 ns
C167A-4
< 5 ns
(a)
(b)
C167A-3
THEVENIN EQUIVALENT 125 OUTPUT
1.9V
Switching Characteristics Over the Operating Range[6]
7C167A-15 Parameter READ CYCLE tRC tAA tOHA tACE tLZCE tHZCE tPU tPD tWC tSCE tAW tHA tSA tPWE tSD tHD tHZWE tLZWE Read Cycle Time Address to Data Valid Data Hold from Address Change CE LOW to Data Valid CE LOW to Low Z [7] CE HIGH to High Z
[7, 8]
7C167A-20 Min. 20 Max.
7C167A-25 Min. 25 Max.
7C167A-35 Min. 30 Max.
7C167A-45 Min. Max. Unit ns
Description
Min. 15
Max.
15 5 15 5 8 0 15 15 12 12 0 0 12 10 0 7 5 5 20 15 15 0 0 15 10 0 0 5 5
20 5 20 5 8 0 20 20 20 20 0 0 15 10 0 7 5
25 5 25 5 10 0 20 25 25 25 0 0 20 15 0 7 5
30 5 35 5 15 0 20 40 30 30 0 0 20 15 0 10 5 15 25 15 45
ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns
CE LOW to Power-Up CE HIGH to Power-Down Write Cycle Time CE LOW to Write End Address Set-Up to Write End Address Hold from Write End Address Set-Up to Write Start WE Pulse Width Data Set-Up to Write End Data Hold from Write End WE LOW to High Z
[7, 8]
WRITE CYCLE[9]
WE HIGH to Low Z[7]
Notes: 5. Tested initially and after any design or process changes that may affect these parameters. 6. Test conditions assume signal transition times of 5 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V, and output loading of the specified I OL/IOH and 30-pF load capacitance. 7. At any given temperature and voltage condition, tHZ is less than t LZ for any given device. 8. t HZCE and t HZWE are tested with CL = 5 pF as in part (b) of AC Test Loads. Transition is measured 500 mV from steady state voltage. 9. The internal write time of the memory is defined by the overlap of CE LOW and WE LOW. Both signal must be LOW to initiate a write and either signal can terminate a write by going HIGH. The data input set-up and hold timing should be referenced to the rising edge of the signal that terminates the write.
3
CY7C167A
Switching Waveforms
Read Cycle No. 1[10, 11]
ADDRESS tOHA DATA OUT PREVIOUS DATA VALID tAA DATA VALID
C167A-5
tRC
Read Cycle No. 2
[10, 12]
tRC CE tACE tLZCE DATA OUT VCC SUPPLY CURRENT HIGH IMPEDANCE tPU 50% DATA VALID tPD ICC 50% ISB
C167A-6
tHZCE
HIGH IMPEDANCE
Write Cycle No. 1 (WE Controlled)[9]
tWC ADDRESS tSCE CE tSA WE tSD DATA IN DATAIN VALID tHZWE DATA I/O DATA UNDEFINED
C167A-7
tAW tPWE
tHA
tHD
tLZWE HIGH IMPEDANCE
Notes: 10. WE is high for read cycle. 11. Device is continuously selected, CE = VIL. 12. Address valid prior to or coincident with CE transition LOW.
4
CY7C167A
Switching Waveforms (continued)
Write Cycle No. 2 (CE Controlled)[9, 13]
tWC ADDRESS tSA CE tAW tPWE WE tSD DATA IN tHZWE HIGH IMPEDANCE DATA I/O DATA UNDEFINED
C167A-8
tSCE
tHA
tHD
DATAIN VALID
Note: 13. If CE goes HIGH simultaneously with WE HIGH, the output remains in a high-impedance state.
5
CY7C167A
Typical DC and AC Characteristics
OUTPUT SOURCE CURRENT (mA) NORMALIZED SUPPLY CURRENT vs. SUPPLY VOLTAGE 1.4 NORMALIZED ICC , I SB NORMALIZED ICC , I SB 1.2 1.0 0.8 0.6 0.4 0.2 0.0 4.0 4.5 ISB 5.0 5.5 6.0 ICC 1.2 1.0 0.8 0.6 0.4 0.2 0.0 -55 ISB 25 125 VCC = 5.0V VIN = 5.0V ICC NORMALIZED SUPPLY CURRENT vs. AMBIENT TEMPERATURE OUTPUT SOURCE CURRENT vs. OUTPUT VOLTAGE 60 50 40 30 20 10 0 0 1.0 2.0 3.0 4.0 OUTPUT VOLTAGE (V) VCC = 5.0V TA = 25C
SUPPLY VOLTAGE (V)
AMBIENT TEMPERATURE (C)
1.4 NORMALIZED tAA NORMALIZED tAA 1.3 1.2 1.1 TA = 25C 1.0 0.9 0.8 4.0 4.5 5.0 5.5 6.0
1.6 1.4 1.2 1.0 VCC = 5.0V 0.8 0.6 -55
OUTPUT SINK CURRENT (mA)
NORMALIZED ACCESS TIME vs. SUPPLY VOLTAGE
NORMALIZED ACCESS TIME vs. AMBIENT TEMPERATURE 150 125 100 75 50 25
OUTPUT SINK CURRENT vs. OUTPUT VOLTAGE
VCC = 5.0V TA = 25C
25
125
0 0.0
1.0
2.0
3.0
4.0
5.0
SUPPLY VOLTAGE (V) TYPICAL POWER-ON CURRENT vs. SUPPLY VOLTAGE 3.0 DELTA tAA (ns) NORMALIZED IPO 2.5 2.0 1.5 1.0 0.5 0.0 0.0 1.0 2.0 3.0 4.0 5.0 0.0 30.0
AMBIENT TEMPERATURE (C) TYPICAL ACCESS TIME CHANGE vs. OUTPUT LOADING 1.1 NORMALIZED ICC
OUTPUT VOLTAGE (V) NORMALIZED ICC vs. CYCLE TIME VCC = 5.0V TA = 25C VIH = 0.5V 1.0
20.0
10.0
VCC = 4.5V TA = 25C
0.9
0
200
400
600
800 1000
0.8 10
20
30
40
SUPPLY VOLTAGE (V)
CAPACITANCE (pF)
CYCLE FREQUENCY (MHz)
6
CY7C167A
Ordering Information
Speed (ns) 15 20 25 35 45 ICC (mA) 80 80 60 60 50 Ordering Code CY7C167A-15PC CY7C167A-15VC CY7C167A-20PC CY7C167A-20VC CY7C167A-25PC CY7C167A-25VC CY7C167A-35PC CY7C167A-35VC CY7C167A-45PC CY7C167A-45VC Document #: 38-00093-E Package Name P5 V5 P5 V5 P5 V5 P5 V5 P5 V5 Package Type 20-Lead (300-Mil) Molded DIP 20-Lead Molded SOJ 20-Lead (300-Mil) Molded DIP 20-Lead Molded SOJ 20-Lead (300-Mil) Molded DIP 20-Lead Molded SOJ 20-Lead (300-Mil) Molded DIP 20-Lead Molded SOJ 20-Lead (300-Mil) Molded DIP 20-Lead Molded SOJ Commercial Commercial Commercial Commercial Operating Range Commercial
7
CY7C167A
Package Diagrams
20-Lead (300-Mil) Molded DIP P5
51-85011-A
20-Lead (300-Mil) Molded SOJ V5
51-85029-A
(c) Cypress Semiconductor Corporation, 2000. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under patent or other rights. Cypress Semiconductor does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges.

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